Circuits and Systems

Circuits and Systems Session

2:00pm-5:00pm, February 23 in person at CSL 141

With the explosion of data-driven technologies, it is now more important than ever to have hardware infrastructure that can keep up with the demands of software applications. This session will showcase the latest advancements in circuit and system design that are critical for supporting the increasingly complex applications that are revolutionizing all fields, from healthcare to finance, to transportation, and beyond. Attendees will hear from researchers who are working on the cutting edge of circuit and system design and participate in the conversation on how circuit and system design can help us tackle some of the biggest challenges society faces by supporting the next generation of applications.

The Circuits and Systems session, taking place on 23rd February from 2:00 PM to 5:00 PM will start with a keynote speech by Professor Matthew Farrens from UC Davis, on the scalable fine grain performance optimization framework. Invited and local students will then present their research on the following topics: (1) System Optimization, (2) Energy Optimization, and (3) In-memory Computing.

Keynote Speaker – Matthew Farrens, University of California, Davis


“Using Current as a Proxy For Work – A Scalable Fine Grain Performance Optimization Framework for Heterogeneous Systems Given a Power Constraint”

Talk Abstract: In this talk I will present a power management technique called Constant Average Power Processing (CAPP), which works by continuously sensing the current drawn by the global power supply network and using that information to set a global voltage based on the power target. Using this global voltage as a constraint, individual processing elements (CPUs, GPUs, accelerators, or a mix of all three) then select an appropriate operating voltage based on their activity. The key insight of this work is to use current as a proxy for the activity of the cores – by sensing the current, communicating it to the global controller and adjusting the processing element’s frequencies, it is possible to maintain a constant power level in a distributed and scalable manner. The concept is validated using circuit simulations and its capabilities on CPU-based, GPU-based and heterogeneous systems are measured. This approach achieves average speedups of 15.9% for the CPU-based design, 12% for the GPU-based design, and 21% for the heterogeneous design by using excess available power throughout operation to improve performance.

Biography: Professor Farrens is interested in all aspects of computer architecture, but primarily in the architecture and design of high-performance single-chip processors with an emphasis on the interconnection/communication layer. Professor Farrens is also interested in high-speed scientific processing, in particular in exploring issues related to the memory system, and in Instruction Level Parallelism. He is a senior member of both ACM and IEEE, in the Micro hall of fame, served 2 separate terms as the chair of the IEEE Technical Committee on Microarchitecture, and just finished a 5-year stint as chair of the UC Davis CS department.


Invited Student Speaker – Saransh Sharma, California Institute of Technology


“3D Localization of Miniaturized Wireless Devices for Precision Medicine”

Talk Abstract: Localization and real-time tracking of devices in vivo with high precision is critical for many surgical and medical diagnostic procedures. For instance, in orthopedic surgeries, precise alignment and control of implants and surgical tools can significantly impact the outcome. The current gold-standard solution for achieving this is through X-ray fluoroscopy since it can provide 100-200┬Ám of localization accuracy, but causes high levels of radiation exposure to the patient and the surgical team. Other important applications that require precise localization of devices inside the body are capsule endoscopy, robotic surgery, cardiovascular procedures and precision targeting of therapeutic interventions. In this work, I will present a radiation-free system for high-precision localization and tracking of miniaturized electronic devices in vivo. Inspired by MRI, we generate magnetic field gradients that encode each spatial point uniquely in the field-of-view. Highly miniaturized, ultralow power and wireless microdevices are designed to measure their local magnetic field magnitude, which is used for mapping to their corresponding spatial coordinates. The microdevices are composed of advanced integrated circuits for magnetic sensing, signal processing, wireless power delivery and wireless data communication. We have tested our system in large animal models to demonstrate 3D localization and tracking of these microdevices with sub-mm resolution in real time and in a large and scalable field-of-view, which sets the state-of-the-art for in vivo sensor tracking.

Biography: Saransh Sharma is a final year PhD student at Caltech, working with Prof. Azita Emami on analog & mixed-signal integrated circuits and system design, with special emphasis on low-power biomedical applications. He received an M.S. degree in Electrical Engineering from Caltech in 2018 and Bachelor’s in Electronics & Electrical Communication Engineering from IIT Kharagpur, India, in 2017. His PhD work has been published in top circuits conferences and journals like ISSCC, CICC, Nature Electronics and IEEE Transactions on Medical Imaging. He holds multiple US patents for the technology developed as part of his PhD work. Saransh was a recipient of the Jakob van Zyl Predoctoral Research Award for outstanding research at Caltech, the Charles Lee Powell Fellowship at Caltech, the Viterbi India Scholarship and the KVPY Fellowship.


Student Speakers

Hyungyo Kim

“Boosting the Accuracy of SRAM-Based In-Memory Architectures via Maximum Likelihood-based Error Compensation Method”

Ji Shi

“Analysis of energy-accuracy trade-off in 10T1C QR IMC via Modeling”

Saion Roy

“Fundamental Limits on the Compute SNR of Resistive In-memory Architectures”

Sudhanshu Agarwal

“Characterizing energy use of garbage collection”


For more information, please contact the session chairs, Yizhen Lu ( and Han-Mo Ou (